Core started - STABLE
Date: Wednesday, May 09 2012 @ 14:08:07 UTC
Topic: Amiga FPGA accelerator
After reparation of accelerator board for past two days I have done number of testings and changes in hardware design. Yesterday i discovered that clk signal from A600 board is not stable because ALVT devices had problems with GND and solved that. Also there was problems with PLCC-68 socket and address bus was not detected by the ALVT devices. Anyhow to realize those problems I had to write MC68K_probe tool in VHDL to test accelerator and signals from original CPU. After solving those problems I have working TG68 core on Accelerator board but there are lot of things to be done to get this working. First of all I need to disable original CPU to see that everything is fine with Accelerator. I know that I must take BR signal low but there are more signals that need to be handled to take over the bus from original CPU.
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